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 74HC2GU04
Dual unbuffered inverter
Rev. 01 -- 6 October 2006 Product data sheet
1. General description
The 74HC2GU04 is a high-speed Si-gate CMOS device. The 74HC2GU04 provides two unbuffered inverters.
2. Features
I I I I Wide supply voltage range from 2.0 V to 6.0 V Complies with JEDEC standard no. 7A High noise immunity ESD protection: N HBM JESD22-A114-D exceeds 2000 V N MM JESD22-A115-A exceeds 200 V Low power dissipation Balanced propagation delays Multiple package options Specified from -40 C to +85 C and -40 C to +125 C
I I I I
3. Ordering information
Table 1. Ordering information Package Temperature range Name 74HC2GU04GW 74HC2GU04GV -40 C to +125 C -40 C to +125 C SC-88 SC-74 Description plastic surface-mounted package; 6 leads plastic surface-mounted package (TSOP6); 6 leads Version SOT363 SOT457 Type number
4. Marking
Table 2. Marking Marking code PD HU4 Type number 74HC2GU04GW 74HC2GU04GV
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
5. Functional diagram
1
1
1A
1Y
6
1
6
3
2A
2Y
4
3
1
4
mnb080
A
Y
mna045
mnb079
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram (one gate)
6. Pinning information
6.1 Pinning
74HC2GU04
1A GND 1 2 6 5 1Y VCC 2Y
2A
3
001aaf305
4
Fig 4. Pin configuration
6.2 Pin description
Table 3. Symbol 1A GND 2A 2Y VCC 1Y Pin description Pin 1 2 3 4 5 6 Description data input ground (0 V) data input data output supply voltage data output
74HC2GU04_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
2 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
7. Functional description
Table 4. Input nA L H
[1] H = HIGH voltage level; L = LOW voltage level.
Function table[1] Output nY H L
8. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO ICC IGND Tstg Ptot
[1] [2]
Parameter supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation
Conditions VI < -0.5 V or VI > VCC + 0.5 V VO < -0.5 V or VO > VCC + 0.5 V VO = -0.5 V to VCC + 0.5 V
[1] [1] [1] [1] [1]
Min -0.5 -65
[2]
Max +7.0 20 20 25 +50 -50 +150 250
Unit V mA mA mA mA mA C mW
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SC-88 and SC-74 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
9. Recommended operating conditions
Table 6. Symbol VCC VI VO Tamb tr Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature rise time except for Schmitt trigger inputs VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tf fall time except for Schmitt trigger inputs VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 1000 500 400 ns ns ns 1000 500 400 ns ns ns Conditions Min 2.0 0 0 -40 Typ 5.0 +25 Max 6.0 VCC VCC +125 Unit V V V C
74HC2GU04_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
3 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
10. Static characteristics
Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Tamb = 25 C VIH HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = -20 A; VCC = 2.0 V IO = -20 A; VCC = 4.5 V IO = -20 A; VCC = 6.0 V IO = -4.0 mA; VCC = 4.5 V IO = -5.2 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V II ICC CI VIH input leakage current supply current input capacitance HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = -20 A; VCC = 2.0 V IO = -20 A; VCC = 4.5 V IO = -20 A; VCC = 6.0 V IO = -4.0 mA; VCC = 4.5 V IO = -5.2 mA; VCC = 6.0 V 1.9 4.4 5.9 4.13 5.63 2.0 4.5 6.0 4.32 5.81 V V V V V VI = GND or VCC; VCC = 6.0 V VI = GND or VCC; IO = 0 A; VCC = 6.0 V 1.7 3.6 4.8 3.0 1.1 2.4 3.1 0.9 2.1 2.9 0.3 0.9 1.2 pF V V V V V V Tamb = -40 C to +85 C 0 0 0 0.15 0.16 0.1 0.1 0.1 0.26 0.26 0.1 1.0 V V V V V A A 1.9 4.4 5.9 4.13 5.63 2.0 4.5 6.0 4.32 5.81 V V V V V 1.7 3.6 4.8 1.1 2.4 3.1 0.9 2.1 2.9 0.3 0.9 1.2 V V V V V V Parameter Conditions Min Typ Max Unit
74HC2GU04_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
4 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
Table 7. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VOL Parameter LOW-level output voltage Conditions VI = VIH or VIL IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V II ICC input leakage current supply current VI = GND or VCC; VCC = 6.0 V VI = GND or VCC; IO = 0 A; VCC = 6.0 V Tamb = -40 C to +125 C VIH HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = -20 A; VCC = 2.0 V IO = -20 A; VCC = 4.5 V IO = -20 A; VCC = 6.0 V IO = -4.0 mA; VCC = 4.5 V IO = -5.2 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V II ICC input leakage current supply current VI = GND or VCC; VCC = 6.0 V VI = GND or VCC; IO = 0 A; VCC = 6.0 V 0.1 0.1 0.1 0.4 0.4 1.0 20.0 V V V V V A A 1.9 4.4 5.9 3.7 5.2 V V V V V 1.7 3.6 4.8 0.3 0.9 1.2 V V V V V V 0 0 0 0.15 0.16 0.1 0.1 0.1 0.33 0.33 1.0 10.0 V V V V V A A Min Typ Max Unit
74HC2GU04_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
5 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
11. Dynamic characteristics
Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter Conditions 25 C -40 C to +125 C Max (85 C) 75 15 13 95 19 16 Max (125 C) 90 18 15 125 25 20 ns ns ns ns ns ns pF Unit Min Typ Max Min tpd propagation delay nA to nY; see Figure 5 VCC = 2.0 V; CL = 50 pF VCC = 4.5 V; CL = 50 pF VCC = 6.0 V; CL = 50 pF tt transition time nY; see Figure 5 VCC = 2.0 V; CL = 50 pF VCC = 4.5 V; CL = 50 pF VCC = 6.0 V; CL = 50 pF CPD
[1] [2] [3]
[2] [1]
[3]
13 6 5 18 6 5 5
60 12 10 75 15 13 -
-
power dissipation capacitance VI = GND to VCC
tpd is the same as tPLH and tPHL tt is the same as tTLH and tTHL CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of the outputs.
-
12. Waveforms
VI nA input GND t PHL VOH nY output VOL t THL VM VM
10%
VM
VM
t PLH
90%
t TLH
mna722
Measurement points are given in Table 9. VOL and VOH are typical voltage output drop that occur with the output load.
Fig 5. The data input (nA) to output (nY) propagation delays and output transition times
74HC2GU04_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
6 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
Table 9. Input VM 0.5VCC
Measurement points Output VI GND to VCC tr = tf 6.0 ns VM 0.5VCC
VCC VI D.U.T RT CL VO RL = 1 k
VCC
PULSE GENERATOR
open 50 pF
mgk563
Test data is given in Table 10. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 6. Load circuitry for switching times Table 10. Input VI GND to VCC tr, tf 6 ns Test data Test tPHL, tPLH open
13. Additional characteristics
Rbias = 560 k
VCC
0.47 F
input
output
100 F
VI (f = 1 kHz)
A IO GND
mna050
I o g fs = -------V i
VO is constant.
Fig 7. Test set-up for measuring forward transconductance
74HC2GU04_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
7 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
30 gfs (mA/V) 20
mnb124
10
0 0 2 4 6 VCC (V) 8
Tamb = 25 C.
Fig 8. Typical forward transconductance as a function of supply voltage
14. Typical transfer characteristics
mnb122
150 ICC (A) 120
mnb121
2 VO (V) 1.6
10 I CC (mA) 8
5 VO (V) 4
90
1.2
6
3
60
0.8
4
2
30
0.4
2
1
0 0 0.4 0.8 1.2 1.6 VI (V) 2
0
0 0 1 2 3 4 VI (V) 5
0
VCC = 2.0 V; IO = 0 A.
VCC = 4.5 V; IO = 0 A.
Fig 9. Typical transfer characteristics VCC = 2.0 V
Fig 10. Typical transfer characteristics VCC = 4.5 V
74HC2GU04_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
8 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
20 I CC (mA) 16
mnb123
6
VO (V)
12 3 8
4
0
0 2 4 VI (V) 6
0
VCC = 6.0 V; IO = 0 A.
Fig 11. Typical transfer characteristics VCC = 6.0 V
15. Application information
Some applications for the 74HC2GU04 are:
* Linear amplifier (see Figure 12) * Crystal oscillator (see Figure 13).
Remark: All values given are typical values unless otherwise specified.
R2
VCC
1 F R1
U04
ZL
mna052
ZL > 10 k. R1 3 k. R2 1 M. Open loop amplification: AOL = 20. Voltage amplification: A V = - ---------------------------------------- . R1
A OL
1 + ------ ( 1 + A OL ) R2
Vo(p-p) = VCC - 1.5 V centered at 0.5 x VCC. Unity gain bandwidth product is 5 MHz.
Fig 12. Linear amplifier application
74HC2GU04_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
9 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
R1
R2
U04
C1 C2
out
mna053
Test data is given in Table 11 and Table 12. C1 = 47 pF. C2 = 22 pF. R1 = 1 M to 10 M. R2 optimum value depends on the frequency and required stability against changes in VCC or average minimum ICC (ICC = 2 mA at VCC = 3.0 V and f = 1 MHz).
Fig 13. Crystal oscillator application Table 11. Frequency 10 kHz to 15.9 kHz 16 kHz to 24.9 kHz 25 kHz to 54.9 kHz 55 kHz to 129.9 kHz 130 kHz to 199.9 kHz 200 kHz to 349.9 kHz 350 kHz to 600 kHz Table 12. Frequency 3 kHz 6 kHz 10 kHz 14 kHz > 14 kHz External components for resonator (f < 1 MHz) R1 2.2 M 2.2 M 2.2 M 2.2 M 2.2 M 2.2 M 2.2 M R2 220 k 220 k 100 k 100 k 47 k 47 k 47 k C1 56 pF 56 pF 56 pF 47 pF 47 pF 47 pF 47 pF C2 20 pF 10 pF 10 pF 5 pF 5 pF 5 pF 5 pF
Optimum value for R2 R2 2.0 k 8.0 k 1.0 k 4.7 k 0.5 k 2.0 k 0.5 k 2.0 k Optimum for minimum required ICC for minimum influence due to change in VCC or minimum required ICC or minimum influence by VCC or minimum required ICC or minimum influence by VCC or minimum required ICC or minimum influence by VCC
replace R2 by C3 = 35 pF (typical)
74HC2GU04_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
10 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
16. Package outline
Plastic surface-mounted package; 6 leads SOT363
D
B
E
A
X
y
HE
vMA
6
5
4
Q
pin 1 index
A
A1
1
e1 e
2
bp
3
wM B detail X Lp
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT363
REFERENCES IEC JEDEC JEITA SC-88
EUROPEAN PROJECTION
ISSUE DATE 04-11-08 06-03-16
Fig 14. Package outline SOT363 (SC-88)
74HC2GU04_1 (c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
11 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
Plastic surface-mounted package (TSOP6); 6 leads
SOT457
D
B
E
A
X
y
HE
vMA
6
5
4
Q
pin 1 index
A A1 c
1
2
3
Lp
e
bp
wM B detail X
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 0.1 0.013 bp 0.40 0.25 c 0.26 0.10 D 3.1 2.7 E 1.7 1.3 e 0.95 HE 3.0 2.5 Lp 0.6 0.2 Q 0.33 0.23 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT457
REFERENCES IEC JEDEC JEITA SC-74
EUROPEAN PROJECTION
ISSUE DATE 05-11-07 06-03-16
Fig 15. Package outline SOT457 (SC-74)
74HC2GU04_1 (c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
12 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
17. Abbreviations
Table 13. Acronym CMOS ESD HBM MM DUT Abbreviations Description Complementary Metal Oxide Semiconductor ElectroStatic Discharge Human Body Model Machine Model Device Under Test
18. Revision history
Table 14. Revision history Release date 20061006 Data sheet status Product data sheet Change notice Supersedes Document ID 74HC2GU04_1
74HC2GU04_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
13 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
19. Legal information
19.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
19.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
20. Contact information
For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com
74HC2GU04_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
14 of 15
NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
21. Contents
1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 17 18 19 19.1 19.2 19.3 19.4 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 3 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Additional characteristics . . . . . . . . . . . . . . . . . 7 Typical transfer characteristics . . . . . . . . . . . . 8 Application information. . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Contact information. . . . . . . . . . . . . . . . . . . . . 14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2006.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 6 October 2006 Document identifier: 74HC2GU04_1


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